In a course named ‘Digital System Design’, we learned how to write declare circuits in Verilog language – a hardware declarative language like VHDL. This was a project that was mandatory for us to do. The project was about finding zero among a string of ones and zeros. I wrote two main parts for this project, a design module and a bench test, to get a timing diagram to see whether the code was appropriate.
From my point of view, this project was so helpful to me in knowing how hardware declarative languages work and what their usages are.
